Summary

This role develops inference engines that orchestrate heterogeneous hardware using SGLang, vLLM, Python, C++, and CUDA. It is an in-person position based in Callosum's London office, focused on scheduling, memory management, parallelism, and disaggregated serving.

Responsibilities

• Contribute upstream to SGLang and vLLM
• Maintain internal forks for divergent requirements
• Improve hardware-aware scheduling and memory management
• Design parallelism and disaggregation strategies
• Map engine abstractions to accelerator capabilities
• Optimise execution pipelines for heterogeneous hardware